List of VLSI Universities around the world

Hello,
VLSI-world.com now collects list of VLSI universities around the world. You might help to improve the list. checkout the following link

http://www.vlsi-world.com/content/view/68/81/

see you there,

Introduction to Controller Area Network (CAN Bus)

Hello ppl,
Do you want to learn the basics of CAN BUS? There is fresh article post on vlsi-world.com. Make use of it. click HERE to read

Comments are as usual always welcome

Glitch free safe clock switching

Hi Surfers,
Here is the circuit and verilog code for Glitch free safe clock switching. It also has the simulated waveform for the circuit.
Here is the link
http://www.vlsi-world.com/content/view/64/47/

Have a look on it send us your feedback

Enjoy your stay at www.vlsi-world.com

Understanding of HDL code coverage with example

Hi readers,
There is a new article posted in www.vlsi–world.com on HDL code coverage basics.

This article explained with an practical example.

Here is the link http://www.vlsi-world.com/content/view/63/47/

send your feedback about this atticle.

Cheers

IEEE consent for publishing VHDL glossary at vlsi-world.com

VLSI-world.com is one step ahead then before. We have received IEEE permission for publishing VHDL glossary in vlsi-world.com. In one month time period VHDL glossary will be available for reference.

New analog topics

hi techies,
there are 4 new articles are added under the title "analog design" in vlsi-world.com.They are
Half Wave Rectifier
Half Wave Rectifier with Capacitor
Step Down Converter (Buck Converter)
Voltage Regulator

Read at http://www.vlsi-world.com/content/category/8/26/55/

see you soon with some more new articles

Partial reconfiguration on FPGA at www.vlsi-world.com

Hi there,

there is a new article on Partial reconfiguration on FPGA posted in www.vlsi-world.com

Dynamic Partial Reconfiguration provides a way to modify the implemented logic
in FPGA when the device is on.More clearly DPR allows reconfiguring selected
areas of a FPGA when other parts of FPGA still working. DPR is not supported on
all FPGAs. For example in Xilinx Spartan 3, Virtex II, Virtex II Pro, and Virtex
4 are only............

Read more here http://www.vlsi-world.com/content/view/48/47/

happy reading
karthik